VLSI Design Engineer
Trion Consultancy Services 4.9
General
Work from Office
1
Any
Not Required
No
Job Description
Define, architect, and lead System-on-Chip (SoC) microarchitecture design for advanced applications, including medical devices.
Lead and review RTL design development using Verilog / SystemVerilog and oversee verification planning with UVM frameworks.
Collaborate closely with physical design teams to ensure seamless RTL-to-GDSII handoffs, synthesis, and floorplanning.
Oversee timing closure, power optimization, clock tree synthesis (CTS), and place & route (P&R) implementation.
Drive architectural trade-off studies, performance modeling, and area-power-timing (PPA) optimization.
Maintain comprehensive design specification documentation, verification plans, and architecture review sign-offs.
Compensation:
Salary: ₹15–17 Lacs PA.
Qualifications
B.E. / B.Tech / M.E. / M.Tech in VLSI Design, Microelectronics, Electronics & Communication Engineering (ECE), or related field.
3-5 Yrs of core experience in RTL design, SoC architecture, and physical design handoffs.
Strong expertise in UVM-based verification methodologies, digital design flows, and medical device standards.
Proven technical leadership, architecture definition, and cross-functional coordination skills.