Senior Layout Engineer

Design high-quality Custom Layouts for Analog and Mixed-Signal integrated circuit (IC) products.

Work across advanced Semiconductor processes, taking ownership of IP (Intellectual Property) block execution and floorplanning.

Perform physical verification checks including DRC, LVS, and antenna rule validations using EDA software.

Collaborate closely with circuit design engineers to mitigate parasitic effects, matching issues, and noise coupling.

Provide Supervisor leadership and technical guidance to junior layout engineers within the team.

Maintain complete layout sign-off documentation, verification logs, and design rule check reports.

Bachelor's or Master's degree in Electrical Engineering, Microelectronics, VLSI, or related disciplines.

1-3 Yrs of experience in analog and mixed-signal IC layout design.

Strong domain expertise in semiconductor physical design, intellectual property (IP) blocks, and EDA tools.

Excellent technical leadership, floorplanning, and physical verification capabilities.